Correctness has a reference.
CPU execution is a required part of the runtime. Accelerator operations are checked against it with explicit numerical tolerances.
INDEPENDENT · APACHE 2.0 · PRE-ALPHA
Tensor compute.
From Python
to silicon.
A compact tensor runtime for people who want to understand what runs underneath. Python up front. C++20 at the core. CPU, Metal, and CUDA behind one interface.
Experimental by design. Explicit about its limits.
first_tensor.pyPYTHON
import tensorcx as cx
device = cx.best_device()
x = cx.ones((1_000_000,), dtype=cx.float32, device=device)
y = cx.ones((1_000_000,), dtype=cx.float32, device=device)
z = x + y
print(z.cpu().numpy()[:5])
# [2. 2. 2. 2. 2.]OUTPUT
[2. 2. 2. 2. 2.]One million elements. One familiar API.Python APIC++20 core backend-neutral
CPUMetalCUDA
INTERFACEPython 3.11+FOUNDATIONC++20 / nanobindEXECUTIONSynchronous & explicitLICENSEApache 2.0
01 / THE APPROACH
Small enough to follow.
Built to be understood.
Explore tensor execution without losing sight of the runtime, the memory, or the hardware.
The core stays neutral.
Device discovery, buffers, and operation dispatch share a contract. Platform-specific details stay inside each backend.
Experiments stay explicit.
Custom kernels live under cx.experimental. Metal code generation and optional MLIR compilation have defined, narrow scopes.
02 / AVAILABLE TODAY
From tensor operations
to runtime tools.
Tensor data and math
Slicing, concat/stack/split, boolean masks, broadcasting, batched matmul, reductions and selection with topk.
Inference building blocks
Linear layers, affine normalization, embedding and scaled dot-product attention. Explicit execution, without model training.
Share supported storage
DLPack exchange on CPU and CUDA, plus an optional inference-only PyTorch linear custom op.
Compile explicit kernels
Experimental Metal MSL and guarded float32 CPU/CUDA MLIR kernels, including division, sqrt/abs, minimum/maximum, comparisons and select. Persistent code caching.
Inspect and measure
Installation and capability diagnostics, CPU/CUDA memory snapshots, native host profiling and separate compilation measurements.
Control CUDA allocation
Opt-in bounded buffer reuse and direct CUDA empty allocation. Synchronous operations; empty contents remain unspecified.
Availability depends on backend, dtype and the validated environment. The feature overview keeps implemented capabilities and remaining work together.
03 / HARDWARE, HONESTLY
Know what runs. And where.
CPUREFERENCE
The required baseline. Tensor operations, matmul, reductions, and normalization.
MetalAPPLE SILICONStatic Metal kernels, an optional optimized matmul path, and experimental generated kernels.
CUDAOPT-INFloat32/int32/bool data paths, inference primitives and opt-in memory reuse. Real-device validation is limited to sm_52.
Current scope: contiguous tensors, broadcasting, explicit devices and dtype conversion. Autograd and distributed training are outside the current runtime.
04 / OPEN THE WORKBENCH